The smart Trick of Anti-Tamper Digital Clocks That No One is Discussing
The smart Trick of Anti-Tamper Digital Clocks That No One is Discussing
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17. The equipment for detecting clock tampering as defined in declare 15, whereby the Appraise circuit is induced by a clock edge at an end with the clock Examine period of time.
Many procedures may very well be used to detect no matter whether the volume of modifying setup violations is important. One way should be to XOR the state of each detection circuit Using the preceding condition with the circuit and to match the amount of ‘1’s that has a threshold. Yet another way is to determine the particular detection circuit that corresponds While using the predicted frequency applying STA (static timing analysis) or in the course of a calibration phase.
Another aspect of the invention may perhaps reside in an equipment for detecting clock tampering, comprising a circuit that provides a monotone signal, a plurality of resettable delay line segments, and an Examine circuit. The circuit presents the monotone sign in the course of a clock Appraise period of time connected with a clock. The plurality of resettable hold off line segments delay the monotone sign to generate a respective plurality of delayed monotone alerts.
signifies for delaying the monotone sign to deliver a plurality of delayed monotone signals acquiring discretely escalating hold off moments among a bare minimum hold off time as well as a most delay time and every of the plurality of delayed monotone indicators owning either a 1 or perhaps a zero logic benefit;
2. The strategy for detecting clock tampering as described in assert 1, even further comprising: resetting the resettable hold off line segments throughout a reset time frame, wherein the reset period of time is ahead of the clock Consider period of time.
The measures of a way or algorithm described in connection with the embodiments disclosed herein could possibly be embodied straight in components, or in a combination of components along with a program module executed by a processor. A application module may well reside in RAM memory, flash memory, ROM memory, EPROM memory, EEPROM memory, registers, hard disk, a removable disk, a CD-ROM, or almost every other sort of storage medium regarded during the artwork.
23. A method for detecting voltage tampering, comprising: offering a plurality of resettable hold off line segments, wherein resettable delay line segments amongst a resettable hold off line segment connected to a minimum hold off time as well as a resettable delay line section connected with a maximum hold off time are Each and every connected to discretely rising delay instances;
A monotone signal is provided through a clock Consider period of time connected with a clock. The monotone signal is delayed applying Just about every with the plurality of resettable hold off line segments to make a respective plurality of delayed monotone signals. The clock is used to Anti-Tamper Digital Clocks cause an Appraise circuit that works by using the plurality of delayed monotone indicators to detect a clock fault.
34. The equipment for detecting voltage tampering as described in claim 33, wherein the water stage range is determined based upon delayed monotone signals from one or more earlier Appraise time.
In more in-depth elements of the creation, the tactic may well more contain resetting the resettable hold off line segments in the course of a reset time frame.
a primary plurality of resettable delay line segments that each hold off the primary monotone sign to crank out a respective to start with plurality of delayed monotone indicators, wherein resettable delay line segments among a resettable delay line segment linked to a least delay time along with a resettable hold off line section affiliated with a optimum delay time are each connected to discretely expanding hold off moments;
11. The equipment for detecting clock tampering as defined in assert 8, whereby-the indicates for assessing determines whether the number of ones while in the plurality of delayed monotone alerts differs from a h2o degree range by greater than a predetermined threshold.
A different aspect of the creation might reside within an apparatus for detecting clock tampering, comprising: means 250 for offering a monotone signal 220 through a clock Assess period of time 310 associated with a clock CLK; indicates 210 for delaying the monotone signal employing a plurality of resettable delay line segments to deliver a respective plurality of delayed monotone signals 230 possessing discretely escalating hold off periods among a least delay time in addition to a most hold off time; and implies 240 for using the clock CLK to set off an Consider circuit 240 that makes use of the plurality of delayed monotone signals to detect a clock fault.
This certain circuit acts as a h2o stage: circuits connected to shorter delay strains will evaluate a ‘0’ when circuits associated with for a longer time hold off strains will measure a ‘one’. A substantial water amount mark and a small amount mark could serve as a result in.